Samsung develops worlds first 512-Mb DDR2 with 70-nm tech
October 15, 2005 | 12:00am
SEOUL Samsung Electronics Co. Ltd., the world leader in advanced memory technology, announced that it has completed the development of the worlds first 512-megabit (Mb) DDR2 SDRAM using 70-nanometer process, the smallest process technology yet applied to a DRAM device.
The new 70nm technology maintains continuity with the 80nm and 90nm processes Samsung now uses in most DRAM production today.
However, the number of chips yielded per wafer will be at 100 percent higher than could be obtained with 90nm technology.
After completing the first sub-micron DRAM process in 2002, Samsung introduced an 80nm version in 2003 and today has set another industry milestone with the new 70nm version for DRAM fabrication.
Several technological innovations leading to the new 70nm process technology for DRAM, include Samsungs Metal-Insulator-Metal (MIM) capacitor technology, and 3D transistor architecture known as "Sphere-shaped Recess Channel Array Transistor (S-RACT).
These advancements, presented at the VLSI Symposiums of 2004 and 2005, respectively, have been applied to overcome the limitations of stacked DRAM cells and vastly improve the data refresh function, critical to the 70nm 512Mb DRAM.
Samsung plans to continue to follow an aggressive time-to-market DRAM implementation for leading nanometer process technologies as it did with its introduction of the 90nm process in mid-2004 and the 80nm in the second half of 2005.
The 70nm process technology is scheduled to be used in production beginning in the second half of 2006 for 512M, 1G and 2G densities.
Market research firm, Gartner Dataquest revealed in a May 2005 report that the world DRAM market would be worth $26.2 billion this year and would reach $29.1 billion in 2008.
Moreover, next-generation game consoles scheduled for release, most new 3G mobile phones, and Microsofts new PC operating software program "Vista" are noted as key factors fueling the market demand next year.
These developments are expected to contribute to continued diversification and growth of the DRAM market worldwide.
The new 70nm technology maintains continuity with the 80nm and 90nm processes Samsung now uses in most DRAM production today.
However, the number of chips yielded per wafer will be at 100 percent higher than could be obtained with 90nm technology.
After completing the first sub-micron DRAM process in 2002, Samsung introduced an 80nm version in 2003 and today has set another industry milestone with the new 70nm version for DRAM fabrication.
Several technological innovations leading to the new 70nm process technology for DRAM, include Samsungs Metal-Insulator-Metal (MIM) capacitor technology, and 3D transistor architecture known as "Sphere-shaped Recess Channel Array Transistor (S-RACT).
These advancements, presented at the VLSI Symposiums of 2004 and 2005, respectively, have been applied to overcome the limitations of stacked DRAM cells and vastly improve the data refresh function, critical to the 70nm 512Mb DRAM.
Samsung plans to continue to follow an aggressive time-to-market DRAM implementation for leading nanometer process technologies as it did with its introduction of the 90nm process in mid-2004 and the 80nm in the second half of 2005.
The 70nm process technology is scheduled to be used in production beginning in the second half of 2006 for 512M, 1G and 2G densities.
Market research firm, Gartner Dataquest revealed in a May 2005 report that the world DRAM market would be worth $26.2 billion this year and would reach $29.1 billion in 2008.
Moreover, next-generation game consoles scheduled for release, most new 3G mobile phones, and Microsofts new PC operating software program "Vista" are noted as key factors fueling the market demand next year.
These developments are expected to contribute to continued diversification and growth of the DRAM market worldwide.
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